TIMING DRIVEN ROUTING IN INTEGRATED CIRCUIT DESIGN

A method, system, and computer program product for timing driven routing in a design of an integrated circuit (IC) are provided in the illustrative embodiments. A router application executing in a data processing system performs a pre-global routing optimization of the design. A plurality of wirelength target constraints are set on a plurality of subsets of a set of nets in the design. Global routing is performed on the design. The design is adjusted using wires placed in the design during the global routing. A priority is assigned to each net in the set of nets. Detailed routing is performed on the design.