DIRECT THROUGH VIA WAFER LEVEL FANOUT PACKAGE

DIRECT THROUGH VIA WAFER LEVEL FANOUT PACKAGE

Methods, systems, and apparatuses are described for improved integrated circuit packages. An integrated circuit package includes a semiconductor substrate and a semiconductor die. The semiconductor substrate has opposing first and second surfaces, a plurality of vias through the semiconductor substr...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: LAW EDWARD, KHAN REZAUR RAHMAN, WANG KEN JIAN MING
Format: Patent
Sprache:eng
Schlagworte:
BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
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Beschreibung
Zusammenfassung:Methods, systems, and apparatuses are described for improved integrated circuit packages. An integrated circuit package includes a semiconductor substrate and a semiconductor die. The semiconductor substrate has opposing first and second surfaces, a plurality of vias through the semiconductor substrate, and routing one or both surfaces of the semiconductor substrate. The die is mounted to the first surface of the semiconductor substrate. An encapsulating material encapsulates the die on the first surface of the semiconductor substrate.