DEFECT IMAGE PROCESSING APPARATUS, DEFECT IMAGE PROCESSING METHOD, SEMICONDUCTOR DEFECT CLASSIFYING APPARATUS, AND SEMICONDUCTOR DEFECT CLASSIFYING METHOD

A defect image processing apparatus uses a normalized cross correlation to image-match a layout image (52) acquired from a design data with an image acquired by removing, from a defect image (53), the defect area portions thereof, and displays, as a result of that matching, a layout image and defect...

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Bibliographische Detailangaben
Hauptverfasser:	FUNAKOSHI TOMOHIRO, TANDAI YUTAKA, ISHIKAWA TAMAO, HAMAMURA YUICHI, ICHINOSE KATSUHIKO, KURIHARA SHIGEKI, ISOGAI SEIJI, SAKAI TSUNEHIRO
Format:	Patent
Sprache:	eng
Schlagworte:	BASIC ELECTRIC ELEMENTS CALCULATING COMPUTING COUNTING ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY HANDLING RECORD CARRIERS IMAGE DATA PROCESSING OR GENERATION, IN GENERAL INVESTIGATING OR ANALYSING MATERIALS BY DETERMINING THEIRCHEMICAL OR PHYSICAL PROPERTIES MEASURING PHYSICS PRESENTATION OF DATA RECOGNITION OF DATA RECORD CARRIERS SEMICONDUCTOR DEVICES TESTING
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Beschreibung
Zusammenfassung:	A defect image processing apparatus uses a normalized cross correlation to image-match a layout image (52) acquired from a design data with an image acquired by removing, from a defect image (53), the defect area portions thereof, and displays, as a result of that matching, a layout image and defect image (54) on the display device. In the displayed layout image & defect image (54), not only the layout image, the layer of which is the same as that of the defect image (53), but also a layout image of another layer is displayed superimposed on the defect image (53). This makes it easier to analyze the factor of a systematic defect having occurred due to a positional relationship with another layer.