SELF TIMED CURRENT INTEGRATING SCHEME EMPLOYING LEVEL AND SLOPE DETECTION

SELF TIMED CURRENT INTEGRATING SCHEME EMPLOYING LEVEL AND SLOPE DETECTION

Some embodiments of the invention relate to a sense amplifier configured to determine the slope of a bitline charging voltage and to utilize the determined slope in combination with a voltage level sensing scheme to aid in reading data from a memory cell associated with the bitline. In particular, a...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: BACKHAUSEN ULRICH, JEFREMOW MIHAIL, KERN THOMAS, MENCZIGAR ULLRICH
Format: Patent
Sprache:eng
Schlagworte:
INFORMATION STORAGE
MEASURING
MEASURING ELECTRIC VARIABLES
MEASURING MAGNETIC VARIABLES
PHYSICS
STATIC STORES
TESTING
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Beschreibung
Zusammenfassung:Some embodiments of the invention relate to a sense amplifier configured to determine the slope of a bitline charging voltage and to utilize the determined slope in combination with a voltage level sensing scheme to aid in reading data from a memory cell associated with the bitline. In particular, a sense amplifier circuit is configured to determine a slope of a bit line charging voltage and based upon the determined slope to adjust the slope of the bitline voltage (e.g., by adding a dynamic slope dependent current to a memory cell current configured to charge the bitline) provided to a sense amplifier. By adjusting the slope of the bitline voltage, the charging speed of memory cells in a low resistive state (e.g., having a high cell current and therefore a good SNR) can be increased.