VERIFICATION OF OPERATING SELF MODIFYING CODE
Verification of a system-under-test (SUT) supporting the functionality of operating a self modifying code is disclosed. A generator may generate a self modifying code. In response to identification that a simulator is about to simulate code generated by the self modifying code, the simulator may sim...
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Format: | Patent |
Sprache: | eng |
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Zusammenfassung: | Verification of a system-under-test (SUT) supporting the functionality of operating a self modifying code is disclosed. A generator may generate a self modifying code. In response to identification that a simulator is about to simulate code generated by the self modifying code, the simulator may simulate the execution in a "rollover mode". The code may include instruction codes having variable byte size, branching instructions, loops or the like. The simulator may further simulate execution of an invalid instruction. The simulator may perform rollback the simulation of the rollover mode in certain cases and avoid entering the rollover mode. The simulator may perform rollback in response to identifying a termination condition, as to insure avoiding endless loops. The simulator may perform rollback in response to reading an initialized value that is indefinite. |
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