TEST APPARATUS

Delay circuits apply a delay to set and reset pulses, respectively. An RS flip-flop is set according to the set pulse that has passed through the set delay circuit, and is reset according to the reset pulse received from the reset delay circuit. A demultiplexer receives the reset pulse that has passed through the reset delay circuit. In a first state, the demultiplexer outputs the reset pulse to the reset terminal of the RS flip-flop. In a second state, the demultiplexer outputs the reset pulse signal to the reset delay circuit again, thereby forming a closed loop. A loop control unit counts the number of times a pulse is passed through the loop. When the number of passes through the closed loop reaches a predetermined value, the demultiplexer is set to the first state.