CONFIGURABLE INTEGRATED CIRCUIT WITH BUILT-IN TURNS

Some embodiments of the invention provide configurable integrated circuits ("IC's") with configurable node arrays. In some embodiments, the configurable node array includes numerous (e.g., 50, 100, etc.) configurable nodes arranged in several rows and columns. This array also includes...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: TEIG STEVEN, ROHE ANDRE
Format: Patent
Sprache:eng
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Beschreibung
Zusammenfassung:Some embodiments of the invention provide configurable integrated circuits ("IC's") with configurable node arrays. In some embodiments, the configurable node array includes numerous (e.g., 50, 100, etc.) configurable nodes arranged in several rows and columns. This array also includes several direct offset connections, where each particular direct offset connection connects two nodes that are neither in the same column nor in the same row in the array. In some embodiments, at least some direct offset connections connect pairs of nodes that are separated in the array by more than one row and at least one column, or by more than one column and at least one row. Some embodiments establish a direct connection by (1) a set of wire segments that traverse through a set of the IC's wiring layers, and (2) a set of vias when two or more wiring layers are involved. In some embodiments, some of the direct connections have intervening circuits (e.g., buffer circuits), while other direct connections do not have any intervening circuits. Also, in some embodiments, the nodes in the configurable array are all similar (e.g., have the same set of circuit elements and same internal wiring between the circuit elements).