VALIDATING HIGH SPEED LINK PERFORMANCE MARGIN FOR SWITCH FABRIC WITH ANY-TO-ANY CONNECTION ACROSS A MIDPLANE

VALIDATING HIGH SPEED LINK PERFORMANCE MARGIN FOR SWITCH FABRIC WITH ANY-TO-ANY CONNECTION ACROSS A MIDPLANE

A system for testing link performance margin in a network device includes one or more daughter cards having a driver to transmit a signal and a receiver to receive the signal, and a midplane including a channel to transmit the signal from the driver to the receiver. The system includes multiple conn...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: RANGASWAMY GRANTHANA, CHENGSON DAVID P
Format: Patent
Sprache:eng
Schlagworte:
MEASURING
MEASURING ELECTRIC VARIABLES
MEASURING MAGNETIC VARIABLES
PHYSICS
TESTING
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Beschreibung
Zusammenfassung:A system for testing link performance margin in a network device includes one or more daughter cards having a driver to transmit a signal and a receiver to receive the signal, and a midplane including a channel to transmit the signal from the driver to the receiver. The system includes multiple connector assemblies to connect the one or more daughter cards to the midplane, where each of the multiple connector assemblies includes a different known crosstalk margin value. A bit error rate tester is connected to a link between the driver and the receiver, and the multiple connector assemblies are interchangeably included in the link to approximate different signal-to-noise ratio margins for the tested link.