THREE-DIMENSIONAL STACKED SEMICONDUCTOR INTEGRATED CIRCUIT AND CONTROL METHOD THEREOF
A three-dimensional stacked semiconductor integrated circuit including a plurality of stacked chips. The semiconductor integrated circuit is configured to simultaneously select the plurality of chips in response to an external command and an address, and to activate one of memory banks which are ali...
Gespeichert in:
Hauptverfasser: | , , |
---|---|
Format: | Patent |
Sprache: | eng |
Schlagworte: | |
Online-Zugang: | Volltext bestellen |
Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
Zusammenfassung: | A three-dimensional stacked semiconductor integrated circuit including a plurality of stacked chips. The semiconductor integrated circuit is configured to simultaneously select the plurality of chips in response to an external command and an address, and to activate one of memory banks which are aligned on the same line in a vertical direction, among a plurality of memory banks included in the plurality of chips. |
---|