METHOD AND SYSTEM FOR EFFICIENT EMULATION OF MULTIPROCESSOR ADDRESS TRANSLATION ON A MULTIPROCESSOR

METHOD AND SYSTEM FOR EFFICIENT EMULATION OF MULTIPROCESSOR ADDRESS TRANSLATION ON A MULTIPROCESSOR

A method (and structure) of mapping a memory addressing of a multiprocessing system when it is emulated using a virtual memory addressing of another multiprocessing system includes accessing a local lookaside table (LLT) on a target processor with a target virtual memory address. Whether there is a...

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Bibliographische Detailangaben
Hauptverfasser: O'BRIEN JOHN KEVIN, PRENER DANIEL ARTHUR, ODEN PETER HOWLAND, NAIR RAVI, SATHAYE SUMEDA WASUDEO, ALTMAN ERIK RICHTER, O'BRIEN KATHRYN MARY
Format: Patent
Sprache:eng
Schlagworte:
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
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Zusammenfassung:A method (and structure) of mapping a memory addressing of a multiprocessing system when it is emulated using a virtual memory addressing of another multiprocessing system includes accessing a local lookaside table (LLT) on a target processor with a target virtual memory address. Whether there is a "miss" in the LLT is determined and, with the miss determined in the LLT, a lock for a global page table is obtained.