OBJECT-ORIENTED NETWORK-ON-CHIP MODELING

Network-on-Chip (NoC) is an oncoming solution to the communication bottleneck of System-on-Chip (SoC). For a good design, it runs a simulation verification before the design is realized. The key factors to the accuracy and simulation speed of a simulator depend on how the simulator abstracts the NoC design. The present invention provides an object-oriented NoC modeling, which divides the NoC design space into many design blocks and models them into many abstraction levels. The present invention defines these models carefully to obtain good hardware accuracy. The present invention also provides an object implementation library of different abstraction levels. Thereby, the present invention can reduce the coding time via selecting required components from the object implementation library, inheriting them with some modifications or using them directly. The present invention extends the design exploration space of NoC, preserves good hardware characteristics, and significantly reduces coding effort of a new NoC design.