PRIMARY SIDE CONTROL CIRCUIT AND METHOD FOR ULTRA-LOW IDLE POWER OPERATION

A method and circuit for reducing power consumption during idle mode to ultra-low levels, such as about 1/10th to 1/1000th or less of active power is disclosed. An ultra-low idle power supply comprises a primary circuit, a secondary circuit and a control circuit. The control circuit monitors behavior of the primary circuit and determines whether an idle state or no load condition exists, and if so the primary circuit is disengaged. The control circuit may monitor at least one of a ripple current in an energy storage circuit, temperature of lossy components in the primary circuit, or a current flow through switch circuits within the primary circuit. By disengaging the primary circuit, the power consumption of the ultra-low idle power supply is reduced to ultra-low levels.