METHOD FOR FORMING BIT LINES FOR SEMICONDUCTOR DEVICES

A memory device includes a number of memory cells and a number of bit lines. Each of the bit lines includes a first region having a first width and a first depth and a second region having a second width and a second depth, where the first width is less than the second width. The first region may in...

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Bibliographische Detailangaben
Hauptverfasser: RAMSBEY MARK T, KAMAL TAZRIEN, QIAN WEIDONG
Format: Patent
Sprache:eng
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Zusammenfassung:A memory device includes a number of memory cells and a number of bit lines. Each of the bit lines includes a first region having a first width and a first depth and a second region having a second width and a second depth, where the first width is less than the second width. The first region may include an n-type impurity and the second region may include a p-type impurity,