MULTIPLE-LEVEL MEMORY CELLS AND ERROR DETECTION

Memory, modules and methods for using error detection with multi-level memory cells where the number of storage levels of the memory cells is an integer power of a non-binary prime number are provided. Additional circuit and methods are disclosed.

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Bibliographische Detailangaben
1. Verfasser:	WARE KURT
Format:	Patent
Sprache:	eng
Schlagworte:	BASIC ELECTRONIC CIRCUITRY CALCULATING CODE CONVERSION IN GENERAL CODING COMPUTING COUNTING DECODING ELECTRIC DIGITAL DATA PROCESSING ELECTRICITY INFORMATION STORAGE PHYSICS STATIC STORES
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Beschreibung
Zusammenfassung:	Memory, modules and methods for using error detection with multi-level memory cells where the number of storage levels of the memory cells is an integer power of a non-binary prime number are provided. Additional circuit and methods are disclosed.