Reciever dynamically switching to pseudo differential mode for SOC spur reduction

A low noise amplifier in an integrated circuit, the circuit having a digital portion and an analog portion on a common substrate, the digital portion having at least one clocking frequency, includes an input configured to receive a signal at a tuned frequency and an output circuit. The output circui...

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Bibliographische Detailangaben
Hauptverfasser: KIPER HALIL, KELLECI BURAK, DENG YUANYING, LIN CHARLES G
Format: Patent
Sprache:eng
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Beschreibung
Zusammenfassung:A low noise amplifier in an integrated circuit, the circuit having a digital portion and an analog portion on a common substrate, the digital portion having at least one clocking frequency, includes an input configured to receive a signal at a tuned frequency and an output circuit. The output circuit is configurable to operate in either a single-ended mode or a pseudo differential-ended mode, wherein the output circuit is configured in the pseudo differential-ended mode when the tuned frequency is substantially similar to the at least one clocking frequency or one of its harmonics and otherwise configured in the single-ended mode.