METHOD AND APPARATUS FOR ADJUSTING LOAD IMPEDANCE OF A DISTRIBUTED AMPLIFIER

The application discloses a method and apparatus for adjusting internal load impedances, by section, at feed points present on a distributed amplifier's output transmission line. The method includes determining a summing-point load impedance (Zx) at an off-chip output transmission line of the distributed amplifier. The method further includes determining a driving-point load impedance (Zd) at an output of an on-chip power transistor. The driving-point load impedance diverges and disperses over frequency from that summing-point load impedance due to reactance of at least one on-chip component coupled to the output of the on-chip power transistor. The method then includes determining and providing an offset to summing-point load impedance (Zx) based on the driving-point load impedance (Zd) such that the driving-point load impedance (Zd) converges to the summing-point load impedance (Zx) of that distributed amplifier section.