DISPLAY

A display is provided, which includes a timing controller, a data driver, and first and second termination resistors. The timing controller transmits a transmission signal, including at least one of a data signal, a clock signal, and a strobe signal, in a differential format and drives current in a pull mode. The data driver reconstructs the data from the transmission signal. One end of each of the first and second termination resistors is connected respectively between the data driver and terminations of first and second transmission signal lines, each signal line being a path through which the transmission signal is transmitted from the timing controller to the data driver and the other ends thereof are connected respectively to first and second termination voltage sources. Thus, it is possible to more simply implement the timing controller on the transmitting side, and also to increase data transmission efficiency.