SEMICONDUCTOR CHIP PACKAGE HAVING GROUND AND POWER REGIONS AND MANUFACTURING METHODS THEREOF

A semiconductor package and related methods are described. In one embodiment the semiconductor package includes a die pad, a plurality of leads, a semiconductor chip, and a package body. The die pad includes a first part that includes a lower surface and a first peripheral edge region comprising a ground region. The die pad further includes a second part that is spaced apart from the first part and that includes a lower surface and a second peripheral edge region comprising a power region. The plurality of leads is disposed around the die pad. The semiconductor chip is disposed on the die pad and is electrically coupled to the ground region, the power region, and the plurality of leads. The package body is formed over the semiconductor chip and the plurality of leads.