Method of modeling and employing the CMOS gate slew and output load dependent pin capacitance during timing analysis

An accurate method to compute the capacitance at a pin whose capacitance is slew dependant. The method uses existing library characterized data and provides an equation based approach which can easily be integrated in static timing analysis without the added resource needs that an iterative approach...

Ausführliche Beschreibung

Bibliographische Detailangaben

Hauptverfasser:	ABBASPOUR SOROUSH, SINHA DEBJIT, BHANJI ADIL, FELDMANN PETER
Format:	Patent
Sprache:	eng
Schlagworte:	CALCULATING COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING PHYSICS
Online-Zugang:	Volltext bestellen
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