CARBON NANOTUBE CIRCUITS DESIGN METHODOLOGY

A methodology is provided for optimizing circuit parameters of circuits including carbon nanotube transistors. The method comprises mapping (122) selected transistor design parameters (118), based on carbon nanotube process parameters (120) and selected circuit topologies (114), into carbon nanotube physical attributes. A circuit layout is generated (124) from the carbon nanotube physical attributes and simulated (128). The steps are repeated until circuit specifications (130) are met. The carbon nanotube physical attributes may include, for example, the catalyst width (74) for growing a plurality of carbon nanotubes (72) or number of segments in a serpentine electrode structure (88, 89, 90) contacting a single carbon nanotube (81).