SINGLE SLOPE ANALOG-TO-DIGITAL CONVERTER

A single-slope ADC, particularly suitable for use in a massive-parallel ADC architecture in a readout circuit of a CMOS imager. A plurality of ramp signals are generated which define non-overlapping sub-ranges of the full input range. For each ADC channel, the sub-range in which the voltage of the i...

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Bibliographische Detailangaben
Hauptverfasser: SNOEIJ MARTIJN F, THEUWISSEN ALBERT J.P, HUIJSING JOHAN H, MIEROP ADRIANUS J
Format: Patent
Sprache:eng
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Beschreibung
Zusammenfassung:A single-slope ADC, particularly suitable for use in a massive-parallel ADC architecture in a readout circuit of a CMOS imager. A plurality of ramp signals are generated which define non-overlapping sub-ranges of the full input range. For each ADC channel, the sub-range in which the voltage of the input signal falls is determined, and the corresponding ramp signal is selected for use in the A/D conversion. Thus, the speed of the A/D conversion process can be increased and the power consumption decreased.