MEMORY SUBSYSTEMS WITH FAULT ISOLATION
An exemplary memory subsystem with fault isolation comprises a first data bus routing data groupings in a lower 72 bits to a first memory expander, and a second data bus routing data groupings in an upper 72 bits to a second memory expander. A first memory module receives all of the data groupings i...
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Format: | Patent |
Sprache: | eng |
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Zusammenfassung: | An exemplary memory subsystem with fault isolation comprises a first data bus routing data groupings in a lower 72 bits to a first memory expander, and a second data bus routing data groupings in an upper 72 bits to a second memory expander. A first memory module receives all of the data groupings in the lower 72 bits of each memory expander. A second memory module receives all of the data groupings in the upper 72 bits of each memory expander. A failure in any one or more bytes in an ECC word indicate failures in the computer memory system. |
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