CACHE MEMORY SYSTEM AND CACHE MEMORY CONTROL METHOD

A cache memory system that is connected to a computation device and a memory device includes: a data array that includes a plurality of blocks composed of a plurality of words; a storage unit that, with respect to a block, which stores data in at least one of said words, from among the plurality of blocks, stores an address group of the memory device that is placed in correspondence with that block; a write unit that, when an address from the computation device is not in the storage unit on receiving a write instruction from the computation device, allocates any of the plurality of blocks as a block for writing, and writes the data from the computation device to any word in the block for writing; a word state storage unit that stores word information indicating one or more words, to which the data have been written by the write unit, from among words in the block for writing; and a read unit that, upon having read the data from words indicated by the word information when receiving a read instruction from the computation device, deletes the word information.