DOUBLE DATA RATE (DDR) LOW POWER IDLE MODE THROUGH REFERENCE OFFSET

Embodiments of the invention are generally directed to systems, methods, and apparatuses for a double data rate (DDR) low power idle mode through reference offset. In some embodiments, a host offsets a reference voltage from a termination voltage of a command/address interconnect when the interconne...

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Bibliographische Detailangaben
1. Verfasser: ZUMKEHR JOHN F
Format: Patent
Sprache:eng
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Zusammenfassung:Embodiments of the invention are generally directed to systems, methods, and apparatuses for a double data rate (DDR) low power idle mode through reference offset. In some embodiments, a host offsets a reference voltage from a termination voltage of a command/address interconnect when the interconnect is tri-stated. Other embodiments are described and claimed.