Enhanced Gated Diode Memory Cells

A memory cell for use in an integrated circuit comprises a read transistor and a gated diode. The read transistor has a source terminal. The gated diode has a gate terminal in signal communication with the read transistor. A variable source voltage acts on the source terminal of the read transistor when the memory cell is in operation. The variable source voltage is temporarily altered when the memory cell is read. For example, the source voltage may be reduced when the read transistor is implemented using an N-type transistor and increased when the read transistor is implemented using P-type transistor. This acts to impart the memory cell with faster read speed, higher read margin, and lower standby current.