MEMORY ARRAY ON MORE THAN ONE DIE

MEMORY ARRAY ON MORE THAN ONE DIE

For one disclosed embodiment, an apparatus may comprise a first die including a first plurality of memory cells for a memory array and a second die including a second plurality of memory cells for the memory array. The second die may include a shared line for the memory array to conduct digital sign...

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Bibliographische Detailangaben
Hauptverfasser: RUPLEY, II JEFFREY P, TAUFIQUE MOHAMMED H, BLACK BRYAN, MCCAULEY DONALD W, LOH GABRIEL H, DEVALE JOHN P, JALLICE DERWIN, BREKELBAUM EDWARD A
Format: Patent
Sprache:eng
Schlagworte:
BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
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Beschreibung
Zusammenfassung:For one disclosed embodiment, an apparatus may comprise a first die including a first plurality of memory cells for a memory array and a second die including a second plurality of memory cells for the memory array. The second die may include a shared line for the memory array to conduct digital signals for memory cells of both the first and second plurality of memory cells. Other embodiments are also disclosed.