Programmable Data Processor for a Variable Length

A data processing circuit has a programmable processor (12a, b) with an instruction set that comprises an new type of instruction. This instruction has a first operand that refers to a string of bits, and a second operand that refers to a position in that string of bits. The programmable processor (12a, b) is arranged to execute this type of instruction by returning, as a result, a code that is indicative of a count of a number of bits that occurs from said position in the string of bits until the string of bits from said position deviates from a predetermined bit pattern. The instruction is particularly useful for use in programs that perform variable length decoding and/or decoding.