SEMICONDUCTOR DEVICE

An I/O buffer section is provided with a status setting circuit. The status setting circuit arbitrarily sets a signal state of an I/O terminal according to a combination of control signals stored in a setting register. Thus, the I/O buffer section is temporarily set to a Hi-Z state by the status set...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Hauptverfasser: KAWAKAMI FUMIKI, YADA NAOKI
Format: Patent
Sprache:eng
Schlagworte:
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
Beschreibung
Zusammenfassung:An I/O buffer section is provided with a status setting circuit. The status setting circuit arbitrarily sets a signal state of an I/O terminal according to a combination of control signals stored in a setting register. Thus, the I/O buffer section is temporarily set to a Hi-Z state by the status setting circuit even in the case of the I/O terminal originally set to a signal holding state. Consequently, a leak test for testing whether the I/O buffer section is good or bad, can be performed, and the reliability of a semiconductor device can be enhanced.