Flip-chip semiconductor package and package substrate applicable thereto

A flip-chip semiconductor package structure and a package substrate applicable thereto are disclosed. The package substrate includes a body having at least a chip-attach area disposed thereon; a plurality of solder pads disposed in the chip-attach area and arranged at different intervals; and a flui...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Hauptverfasser: LIN CHANG-FU, TSAI KUOING
Format: Patent
Sprache:eng
Schlagworte:
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
Beschreibung
Zusammenfassung:A flip-chip semiconductor package structure and a package substrate applicable thereto are disclosed. The package substrate includes a body having at least a chip-attach area disposed thereon; a plurality of solder pads disposed in the chip-attach area and arranged at different intervals; and a fluid-disturbing portion disposed in the chip-attach area at a position where the solder pads are loosely arranged. A flip-chip semiconductor chip is mounted on the solder pads via conductive bumps and an underfill material is filled between the package substrate and the flip-chip semiconductor chip, the underfill material encapsulating the conductive bumps and the fluid-disturbing portion. By protrudingly disposing the fluid-disturbing portion at a position where the conductive bumps are loosely arranged, that is, the conductive bumps having bigger intervals therebetween, gap between the package substrate and the flip-chip semiconductor chip can be reduced so as to increase capillary attraction generated by capillary phenomenon, thereby balancing flow rate of the underfill material between the conductive bumps that are arranged at different intervals and thus avoiding problems of void formation, subsequent popcorn effect or delamination as encountered in the prior art.