METHOD AND DEVICE FOR DETERMINING AN OPERATIONAL LIFETIME OF AN INTEGRATED CIRCUIT DEVICE

An integrated circuit device includes a degradable test structure, a first external interface pin and a second external interface pin, a first conductive path coupling a first node of the degradable test structure and the first external interface pin, and a second conductive path coupling a second n...

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Bibliographische Detailangaben
Hauptverfasser: PAPAGEORGIOU VASSILIOS, SU MICHAEL ZHUOYING, RAMIREZ AMADO
Format: Patent
Sprache:eng
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Zusammenfassung:An integrated circuit device includes a degradable test structure, a first external interface pin and a second external interface pin, a first conductive path coupling a first node of the degradable test structure and the first external interface pin, and a second conductive path coupling a second node of the degradable test structure and the second external interface pin. Another integrated circuit device includes a non-volatile memory device, a counter comprising an input configured to receive a first clock signal and an output to provide a count value, and control logic configured to store the count value of the counter in the non-volatile memory, whereby the non-volatile memory is externally accessible.