Apparatus for Performing and Coordinating Data Storage Functions

A storage processor is constructed on or within an interconnected circuit (IC) chip. The storage processor has a plurality of ports operable to send and/or receive messages to/from storage devices. An output indication circuit is associated with each output port. The indication circuit indicates that data is ready to be transmitted to a storage device from the particular output port. A crossover circuit is interposed between the ports. The crossover circuit has a memory that can store data. When data is received at a port, the storage processor can store the incoming data to the crossover circuit. A memory is also present on the chip. The memory holds data that relates incoming data to outgoing data. Thus, when data comes into the storage processor, the storage processor can determine a specific course of action for that data based upon the information stored in this memory. The chip also has a plurality of processing sub-units coupled to the crossover switch. Based upon information in the memory, the processing sub units can access and change the data stored in the crossover switch. The sub-units and the ports themselves can relay information via the output indication circuits that specify that the data or the transformed data is ready to be sent from the particular port associated with the output indication circuit. In response to the information on the output indication circuit, a port can then send the data or the transformed data from the crossover switch to a particular storage device. The data in the memory is used to specify the particular device or devices to which the data is sent.