Network on chip device and on-chip data transmission device

An on-chip data transmission device. The on-chip data transmission device comprises a transmitter and a receiver. The transmitter transmits a control signal and a packet when a logic level of the control signal changes, wherein the logic level of the control signal changes every clock cycle, and the clock cycle is determined by an input signal clock A. The receiver receives the transmitted control signal and a clock B having a clock rate as same as clock A, generates a mixed clock having a phase substantially the same as the phase of the clock B, and receives one transmitted packet per clock B cycle.