Architecture for a Physical Interface of a High Speed Front Side Bus

Architecture for a Physical Interface of a High Speed Front Side Bus

A design structure for a high speed computer processor system includes a high speed interface for a graphics processor. In a preferred embodiment, the high speed interface includes a front side bus (FSB) that interfaces to a similar high speed interface on the graphics processor.

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Bibliographische Detailangaben
Hauptverfasser: GEER CHARLES PORTER, BONACCIO ANTHONY RICHARD, WOESTE DANA MARIE, MEGHELLI MOUNIR, DREPS DANIEL MARK, RYLOV SERGEY VLADIMIROVICH, SILJENBERG DAVID W, BUCHHOLTZ TIMOTHY CLYDE, BAUMGARTNER STEVEN JOHN
Format: Patent
Sprache:eng
Schlagworte:
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
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Beschreibung
Zusammenfassung:A design structure for a high speed computer processor system includes a high speed interface for a graphics processor. In a preferred embodiment, the high speed interface includes a front side bus (FSB) that interfaces to a similar high speed interface on the graphics processor.