Semiconductor Integrated Circuit and System Lsi

In a semiconductor integrated circuit 11, there is constructed a test expected value programming circuit 100 having an input/input-output pad 103 for retrieving a ground/power-source signal 104 from a ground terminal 30 or a power source terminal 31 connected to the semiconductor integrated circuit...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Hauptverfasser: MAEDA YASUTERU, MAEDA TOSHINORI
Format: Patent
Sprache:eng
Schlagworte:
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
Beschreibung
Zusammenfassung:In a semiconductor integrated circuit 11, there is constructed a test expected value programming circuit 100 having an input/input-output pad 103 for retrieving a ground/power-source signal 104 from a ground terminal 30 or a power source terminal 31 connected to the semiconductor integrated circuit 11, a switch 105 for selectively switching the outputting of the ground/power-source signal 104 inputted via the input/input-output pad 103, and an expected value generation circuit 13 for generating a test expected value signal 21 based on a switch output signal 122 outputted from the switch 105.