ACS UNIT AND METHOD THEREOF

An add-compare-select (ACS) unit generates first path metrics having a first bit-pair and a most significant bit-pair (MSB), where each bit-pair is in represented in redundant numbers comprising a high bit and a low bit, and comprises a first ACS circuit and an MSB ACS circuit. The first ACS circuit...

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Bibliographische Detailangaben
Hauptverfasser: LEE YINGNG, LIN JEFF
Format: Patent
Sprache:eng
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Zusammenfassung:An add-compare-select (ACS) unit generates first path metrics having a first bit-pair and a most significant bit-pair (MSB), where each bit-pair is in represented in redundant numbers comprising a high bit and a low bit, and comprises a first ACS circuit and an MSB ACS circuit. The first ACS circuit produces the first bit-pair of the first path metrics and a first carry. The MSB ACS circuit comprises a limiting circuit, an MSB maximum select unit, an MSB storage unit, and a reset unit. The limiting circuit, coupled to the first ACS circuit, generates the MSB of the first path metrics based on the first carry, and limits the MSB of the first path metrics to a first predetermined value. The MSB maximum select (MS) unit, coupled to the limiting circuit and another ACS unit, receives an MSB of second path metrics from the other ACS unit, and compares the MSBs of the first and the second path metrics to determine MSB decision signals based on maximum likelihood selection. The MSB storage unit, coupled to the MSB maximum select unit, stores the MSB of the first path metrics as an MSB of a previous first path metric. The reset unit, coupled to the MSB maximum select unit and the MSB storage unit, and resets the high bit of the MSB of the first path metrics to a second predetermined value when the high bits of the MSBs of the first and the second path metrics reach the first predetermined value.