SYSTEMS AND METHODS FOR PROCESSING DATA SETS IN PARALLEL

Various parallel processing devices, methods for designing such and using such are disclosed herein. For example, a parallel linear processing device is disclosed that includes two multipliers. One of the multipliers is operable to multiply a feedback signal by a first value and to provide a first multiplier output. The other multiplier is operable to multiply a data input by a second value and to provide a second multiplier output. The processing device further includes an adder and a register. The adder is operable to sum at least the first multiplier output and the second multiplier output and to provide an adder output. The register is operable to register the adder output as a register output, and the feedback signal provided to the first multiplier is derived from the register output.