FPGA Programming Structure for ATPG Test Coverage

FPGA Programming Structure for ATPG Test Coverage

Testing of combinatorial logic in a programmable device is provided by routing input and/or output test values as signals from and back to dedicated logic through programming circuitry in programmable logic.

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Bibliographische Detailangaben
Hauptverfasser: YAP KETONG, SAMSON DARWIN D.Q, YAO STEPHEN U
Format: Patent
Sprache:eng
Schlagworte:
MEASURING
MEASURING ELECTRIC VARIABLES
MEASURING MAGNETIC VARIABLES
PHYSICS
TESTING
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Beschreibung
Zusammenfassung:Testing of combinatorial logic in a programmable device is provided by routing input and/or output test values as signals from and back to dedicated logic through programming circuitry in programmable logic.