Integrated circuits verification checks of mask layout database, via the internet method and computer software
A system and method for integrated circuits verification checks of mask layout database, via the internet are disclosed. The method includes the submission of mask layout database for a specific verification check, over the internet to a main server. All required setup files are also submitted over...
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Format: | Patent |
Sprache: | eng |
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Zusammenfassung: | A system and method for integrated circuits verification checks of mask layout database, via the internet are disclosed. The method includes the submission of mask layout database for a specific verification check, over the internet to a main server. All required setup files are also submitted over the internet to the main server. The results are sent to the user upon check completion via email. The system includes a web based control panel interface to submit and execute all necessary setups and checks types for integrated circuit mask layout database over the internet using secured protocol, implemented within commercial internet browser. The system also offers a PDA (Personal Digital Assistant) interface to launch verification checks via the internet. This approach eliminates the purchase of a full local license and enables affordable prices for small and medium size chip design firms. This fact significantly reduces integrated circuits design cost and time to market factor for chip design corporations, enabling faster deliveries to their end customers. |
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