Debug Circuit Comparing Processor Instruction Set Operating Mode

A processor is operative to execute two or more instruction sets, each in a different instruction set operating mode. As each instruction is executed, debug circuit comparison the current instruction set operating mode to a target instruction set operating mode sent by a programmer, and outputs an a...

Ausführliche Beschreibung

Bibliographische Detailangaben

Hauptverfasser:	SARTORIUS THOMAS ANDREW, BURKE KEVIN CHARLES, RIZK NABIL AMIR, STREETT DAREN, DEBRUYNE LESLIE MARK, SMITH RODNEY WAYNE, STEMPEL BRIAN MICHAEL, SAPP KEVIN ALLEN
Format:	Patent
Sprache:	eng
Schlagworte:	CALCULATING COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING PHYSICS
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