SENSE-AMPLIFIER ASSIST (SAA) WITH POWER-REDUCTION TECHNIQUE

A design structure comprising an apparatus which reduces the power in memory devices in general and, in particular, static random access memory (SRAM) arrays featuring sense amplifier assist (SAA) circuitry. The design structure limits the implementation of the SAA circuitry to SRAM array blocks tha...

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Bibliographische Detailangaben
Hauptverfasser: BRACERAS GEORGE M, PILO HAROLD, TOWLER FRED J
Format: Patent
Sprache:eng
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Beschreibung
Zusammenfassung:A design structure comprising an apparatus which reduces the power in memory devices in general and, in particular, static random access memory (SRAM) arrays featuring sense amplifier assist (SAA) circuitry. The design structure limits the implementation of the SAA circuitry to SRAM array blocks that do not meet the application voltage requirements.