Stacked Chips with Underpinning
Methods for assembling multi-chip semiconductor packages, and the resulting assemblies themselves, are disclosed. According to the preferred embodiments of the invention, a first semiconductor chip is affixed to a package substrate and a second semiconductor chip is affixed to at least a portion of...
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| Format: | Patent |
| Sprache: | eng |
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| Zusammenfassung: | Methods for assembling multi-chip semiconductor packages, and the resulting assemblies themselves, are disclosed. According to the preferred embodiments of the invention, a first semiconductor chip is affixed to a package substrate and a second semiconductor chip is affixed to at least a portion of a surface of the first semiconductor chip, forming an overhang. Underpinning is interposed for supporting the overhang in resistance to deflection during assembly. |
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