CMOS S/D SiGe DEVICE MADE WITH ALTERNATIVE INTEGRATION PROCESS

A semiconductor device includes a substrate having regions filled with an additive that forms a source/drain for a MOS device, a gate dielectric layer deposited over the substrate, the gate dielectric layer electrically isolates the substrate from subsequently deposited layers, a gate electrode depo...

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Bibliographische Detailangaben
Hauptverfasser: CHO YONAH, KAWAGUCHI MARK N, NOURI FARAN, MA DIANA X, SHEN MEIHUA
Format: Patent
Sprache:eng
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Beschreibung
Zusammenfassung:A semiconductor device includes a substrate having regions filled with an additive that forms a source/drain for a MOS device, a gate dielectric layer deposited over the substrate, the gate dielectric layer electrically isolates the substrate from subsequently deposited layers, a gate electrode deposited over the gate dielectric layer, an oxide liner formed along laterally opposite sidewalls of the gate electrode, a nitride layer formed along the oxide liner extending above the gate electrode, and wherein the additive and the nitride layer enclose the gate electrode.