Programmable address space built-in self test (BIST) device and method for fault detection

A built-in self-test (BIST) circuit for testing addressable locations can include a BIST generator ( 202 ) that can generate test addresses for testing each addressable location. Defective addresses can be stored in a fault address store ( 216 ). An address range selector circuit ( 230 ) can limit t...

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Hauptverfasser: SINGH TARJINDER, DODDAMANE RAMESHA, VADLAMANI ESWAR, KRISHNAN GOPALAKRISHNAN P
Format: Patent
Sprache:eng
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Zusammenfassung:A built-in self-test (BIST) circuit for testing addressable locations can include a BIST generator ( 202 ) that can generate test addresses for testing each addressable location. Defective addresses can be stored in a fault address store ( 216 ). An address range selector circuit ( 230 ) can limit the range of addresses generated by an address generator ( 234 ). Once defective addresses for a first range have been detected, an address range selector circuit ( 230 ) can test another range. An entire address range can thus be tested regardless of the depth of a fault address store ( 216 ).