METHOD AND APPARATUS IN LOCATING CLOCK GATING OPPORTUNITIES WITHIN A VERY LARGE SCALE INTEGRATION CHIP DESIGN

METHOD AND APPARATUS IN LOCATING CLOCK GATING OPPORTUNITIES WITHIN A VERY LARGE SCALE INTEGRATION CHIP DESIGN

A computer implemented method, apparatus, and computer usable program code for generating statistics for a set of components in a computer chip. An exemplary computer implemented method includes identifying the set of components in the computer chip. The set of components include those components wh...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: STASIAK DANIEL L, GLOEKLER TILMAN, SWANSON TODD E, CHAUDHRY RAJAT
Format: Patent
Sprache:eng
Schlagworte:
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
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Beschreibung
Zusammenfassung:A computer implemented method, apparatus, and computer usable program code for generating statistics for a set of components in a computer chip. An exemplary computer implemented method includes identifying the set of components in the computer chip. The set of components include those components which are not clock gated. The exemplary method also includes generating statistics for the set of components. The statistics are related to clock gating testing to identify whether one or more components of the set of components can be clock gated.