METHOD OF FORMING A SHALLOW TRENCH ISOLATION STRUCTURE WITH REDUCED LEAKAGE CURRENT IN A SEMICONDUCTOR DEVICE

A method for fabricating a shallow trench isolation structure for a subthreshold kink-free semiconductor memory device includes the steps of forming a nitride-oxide-nitride-oxide stack on top of a semiconductor substrate, etching shallow trenches in selected areas and filling them with an insulating material so that it is level with the top nitride layer, removing the top nitride layer, depositing a protective material on top of a first device area, removing the top oxide layer in a second device area, removing the protective material, removing the bottom nitride layer in the second device area, performing an oxide etch to the whole device to remove the top oxide layer in the first device area and the bottom oxide layer in the second device area, removing the bottom nitride layer and the bottom oxide layer in the first device area.