Method for improving self-aligned silicide extendibility with spacer recess using an aggregated spacer recess etch (ASRE) integration

A method is provided for making a silicided gate ( 209 ). In accordance with the method, a semiconductor structure ( 201 ) is provided which comprises a semiconductor substrate ( 202 ), a gate ( 209 ) disposed on the semiconductor substrate, and a spacer ( 219 ) adjacent to the gate. The structure i...

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Bibliographische Detailangaben

Hauptverfasser:	SRIVASTAVA ANADI, RAI RAGHAW S, HALL MARK D, YANEZ JESSE
Format:	Patent
Sprache:	eng
Schlagworte:	BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY SEMICONDUCTOR DEVICES
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