Method for improving self-aligned silicide extendibility with spacer recess using an aggregated spacer recess etch (ASRE) integration

A method is provided for making a silicided gate ( 209 ). In accordance with the method, a semiconductor structure ( 201 ) is provided which comprises a semiconductor substrate ( 202 ), a gate ( 209 ) disposed on the semiconductor substrate, and a spacer ( 219 ) adjacent to the gate. The structure is subjected to a first etch which exposes a first lateral portion of the gate. An implant ( 215 ) is then created in a region adjacent to the spacer. The structure is then subjected to a second etch which exposes a second lateral portion of the gate electrode, and a layer of silicide ( 225 ) is formed which extends over the first and second lateral portions of the gate.