Basic cell of semiconductor integrated circuit and layout method thereof

Basic cells each including, in addition to logic cells, one or a plurality of capacity cells between a power supply line and a ground line, and the like, are prepared in advance in the form of a logic synthesis cell library. The prepared basic cells are inserted at a logic synthesis step or layout d...

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Hauptverfasser:	TAKAHASHI ATSUSHI, YAMAGUCHI HIROTO, OHYABU TAKASHI
Format:	Patent
Sprache:	eng
Schlagworte:	BASIC ELECTRIC ELEMENTS BASIC ELECTRONIC CIRCUITRY CALCULATING COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY PHYSICS PULSE TECHNIQUE SEMICONDUCTOR DEVICES
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Beschreibung
Zusammenfassung:	Basic cells each including, in addition to logic cells, one or a plurality of capacity cells between a power supply line and a ground line, and the like, are prepared in advance in the form of a logic synthesis cell library. The prepared basic cells are inserted at a logic synthesis step or layout designing step such that a uniform voltage drop suppression effect is obtained.