I/O circuitry for reducing ground bounce and VCC sag in integrated circuit devices

I/O circuitry for reducing ground bounce and VCC sag in integrated circuit devices

Methods and circuitry for reducing ground bounce and VCC sag effects in integrated circuit ("IC") devices is provided. In particular, a via-programmable design for I/O circuitry in IC devices is provided. The via-programmable I/O circuitry is used to disconnect I/O pin driver circuitry fro...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Hauptverfasser: LEE ENG H, LOO KOK W
Format: Patent
Sprache:eng
Schlagworte:
BASIC ELECTRONIC CIRCUITRY
ELECTRICITY
PULSE TECHNIQUE
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
Beschreibung
Zusammenfassung:Methods and circuitry for reducing ground bounce and VCC sag effects in integrated circuit ("IC") devices is provided. In particular, a via-programmable design for I/O circuitry in IC devices is provided. The via-programmable I/O circuitry is used to disconnect I/O pin driver circuitry from and create a substantially direct connection between unused I/O pins and the ground and/or VCC signals of an IC device to reduce ground bounce and VCC sag, respectively.