Memory cell arrays

Memory cell arrays

A memory device includes memory cells, bit lines, active areas, and transistors formed in each active area and electrically coupling memory cells to corresponding bit lines. The memory cells can have an area of about 6F2, and the bit lines can be coupled to sense amplifiers in a folded bit line conf...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: BROWN KRIS K, LOWREY TYLER A, TRAN LUAN, KERR ROB B, DUNCAN D. M
Format: Patent
Sprache:eng
Schlagworte:
BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
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Beschreibung
Zusammenfassung:A memory device includes memory cells, bit lines, active areas, and transistors formed in each active area and electrically coupling memory cells to corresponding bit lines. The memory cells can have an area of about 6F2, and the bit lines can be coupled to sense amplifiers in a folded bit line configuration. Each bit line may include a first level portion and a second level portion.